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Although we’ve barely begun the PCI Express 5.0 (PCIe Gen 5) generation, the PCI Special Interest Group is already looking ahead. Beginning in 2025, you can expect the PCIe 7.0 specification to be finalized, the group said Tuesday.

PCI Express is the fundamental I/O standard that, on the PC, governs two key components: the discrete GPU, as well as the system’s SSD. Both components are continually improving, requiring ever-faster bandwidth that the PCI Express standard provides.

PCI Express 7.0 will continue the current trend, doubling the PCI Express 6.0 bandwidth from 64 gigatransfers (256GB/s) per second to 128 gigatransfers per second (512GB/s), bi-directionally and via a x16 interface. PCIe 7.0 will also be backwards-compatible with prior generations of the technology, the SIG said.

Because of the nature of how specifications are crafted, published, and then implemented in silicon, specification development often precedes the actual market presence of certified products by years. PCI Express 5.0, for example, was announced in May 2019, but was first introduced in finished products as part of Intel’s current 12th-gen “Alder Lake” processors late last year. (It offers 128GB/s bi-directional speeds.)

PCI Express 5.0 will be supported by AMD’s Ryzen 7000 processors, too, this fall. PCI Express 6.0 was scheduled to be published in 2021, but the final specification was released in January—implying we could see PCIe 6.0 products in 2023. If that trend holds, PCI Express 7.0 will be published in 2025, with the first PCIe 7.0 hardware most likely appearing in 2026 or 2027.
This is an older slide the PCI SIG used in conjunction with the rollout of PCI 6.0, but you can see that the goal of the SIG for PCIe is to double available bandwidth every three years.

From a market perspective, the new standard is expected to be aimed at enterprise applications, including quantum computing, high-performance computing, artificial intelligence, and machine learning. One exception could be support for 800-gigabit ethernet, a technology that’s not even close to mainstream.

Otherwise, PCIe 7.0’s features are what you’d expect: It will use PAM4 signaling, for example. The PCIe SIG has also set “improving power efficiency” as a goal, without saying what those goals might be. Laptop SSDs tend to warm quite easily under load, so it will be interesting to see what strides the SIG is able to make there. In any case, it will be several years before consumers will see the benefits.